Author: Pekka Riikonen <priikone@silcnet.org>
- Copyright (C) 2002 - 2007 Pekka Riikonen
+ Copyright (C) 2002 - 2008 Pekka Riikonen
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
*/
-/****h* silcutil/SILC Types
+/****h* silcutil/Types and Definitions
*
* DESCRIPTION
*
#error "size of the short must be 2 bytes"
#endif
-/******************************* Public API *********************************/
-
-/****d* silcutil/SILCTypes/SilcBool
+/****d* silcutil/SilcBool
*
* NAME
*
***/
typedef unsigned char SilcBool;
-/****d* silcutil/SILCTypes/TRUE
+/****d* silcutil/TRUE
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/FALSE
+/****d* silcutil/FALSE
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SilcUInt8
+/****d* silcutil/SilcUInt8
*
* NAME
*
typedef unsigned char SilcUInt8;
/***/
-/****d* silcutil/SILCTypes/SilcInt8
+/****d* silcutil/SilcInt8
*
* NAME
*
typedef signed char SilcInt8;
/***/
-/****d* silcutil/SILCTypes/SilcUInt16
+/****d* silcutil/SilcUInt16
*
* NAME
*
typedef unsigned short SilcUInt16;
/***/
-/****d* silcutil/SILCTypes/SilcInt16
+/****d* silcutil/SilcInt16
*
* NAME
*
typedef signed short SilcInt16;
/***/
-/****d* silcutil/SILCTypes/SilcUInt32
+/****d* silcutil/SilcUInt32
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SilcInt32
+/****d* silcutil/SilcInt32
*
* NAME
*
*
***/
-/****d* silcutil/SILCTypes/SilcUInt64
+/****d* silcutil/SilcUInt64
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SilcInt64
+/****d* silcutil/SilcInt64
*
* NAME
*
*
***/
+/****d* silcutil/SilcFloat32
+ *
+ * NAME
+ *
+ * typedef float SilcFloat32;
+ *
+ * DESCRIPTION
+ *
+ * 32-bit floating point number.
+ *
+ ***/
+typedef float SilcFloat32;
+
+/****d* silcutil/SilcFloat64
+ *
+ * NAME
+ *
+ * typedef double SilcFloat64;
+ *
+ * DESCRIPTION
+ *
+ * 64-bit floating point number.
+ *
+ ***/
+typedef double SilcFloat64;
+
#if SILC_SIZEOF_VOID_P < 4
typedef SilcUInt32 * void *;
#endif
-/****d* silcutil/SILCTypes/SilcSocket
+/****d* silcutil/SilcSocket
*
* NAME
*
* Platform specific socket. On POSIX compliant systems this is simply
* an integer, representing the socket. On other systems it is platform
* specific socket context. Access it only through routines that can
- * handle SilcSocket types, unless you know what you are doing.
+ * handle SilcSocket types.
*
* SOURCE
*/
#endif
/***/
+/****d* silcutil/SilcParam
+ *
+ * NAME
+ *
+ * typedef SilcUInt32 SilcParam;
+ *
+ * DESCRIPTION
+ *
+ * A generic parameters that describe the type of an parameter or argument.
+ * They can be used to describe function arguments, buffer encoding format,
+ * etc.
+ *
+ * SOURCE
+ */
+typedef SilcUInt32 SilcParam;
+
+#define SILC_PARAM_SINT8 1 /* SilcInt8 */
+#define SILC_PARAM_UINT8 2 /* SilcUInt8 */
+#define SILC_PARAM_SINT16 3 /* SilcInt16 */
+#define SILC_PARAM_UINT16 4 /* SilcUInt16 */
+#define SILC_PARAM_SINT32 5 /* SilcInt32 */
+#define SILC_PARAM_UINT32 6 /* SilcUInt32 */
+#define SILC_PARAM_SINT64 7 /* SilcInt64 */
+#define SILC_PARAM_UINT64 8 /* SilcUInt64 */
+#define SILC_PARAM_SICHAR 9 /* signed char * */
+#define SILC_PARAM_UICHAR 10 /* unsigned char * */
+#define SILC_PARAM_BUFFER 11 /* SilcBuffer */
+#define SILC_PARAM_PTR 12 /* void * */
+#define SILC_PARAM_END 0xfeeefff1 /* End of parameters */
+/***/
+
+/* Internal parameter types, not publicly documented, used mainly by the
+ SILC Buffer Format API (silcbuffmt.h). */
+#define SILC_PARAM_UI8_STRING 100 /* String (max len 8-bits) */
+#define SILC_PARAM_UI16_STRING 101 /* String (max len 16-bits) */
+#define SILC_PARAM_UI32_STRING 102 /* String (max len 32-bits) */
+#define SILC_PARAM_UI8_NSTRING 103 /* String (max len 8-bits) */
+#define SILC_PARAM_UI16_NSTRING 104 /* String (max len 16-bits) */
+#define SILC_PARAM_UI32_NSTRING 105 /* String (max len 32-bits) */
+#define SILC_PARAM_OFFSET 106
+#define SILC_PARAM_ADVANCE 107
+#define SILC_PARAM_FUNC 108
+#define SILC_PARAM_REGEX 109
+#define SILC_PARAM_OFFSET_START 110
+#define SILC_PARAM_OFFSET_END 111
+#define SILC_PARAM_DELETE 112
+#define SILC_PARAM_ALLOC 0x00010000 /* Allocate, bitmask */
+#define SILC_PARAM_REPLACE 0x00020000 /* Replace, bitmask */
+
+/****d* silcutil/SilcCompareValue
+ *
+ * NAME
+ *
+ * typedef enum { ... } SilcCompareValue
+ *
+ * DESCRIPTION
+ *
+ * Values that can be returned by the SilcCompare function. Note that
+ * not all routines may respect all of the return values.
+ *
+ * SOURCE
+ */
+typedef enum {
+ SILC_COMPARE_LESS_THAN_EQUAL_TO = -2, /* Value 1 <= value 2 */
+ SILC_COMPARE_LESS_THAN = -1, /* Value 1 < value 2 */
+ SILC_COMPARE_EQUAL_TO = 0, /* Value 1 == value 2 */
+ SILC_COMPARE_GREATER_THAN = 1, /* Value 1 > value 2 */
+ SILC_COMPARE_GREATER_THAN_EQUAL_TO = 2, /* Value 1 >= value 2 */
+ SILC_COMPARE_STOP = 3, /* Stop comparison */
+} SilcCompareValue;
+/***/
+
+/****f* silcutil/SilcCompare
+ *
+ * SYNOPSIS
+ *
+ * typedef SilcCompareValue (*SilcCompare)(void *value1, void *value2,
+ * void *context);
+ *
+ * DESCRIPTION
+ *
+ * A comparison function used by many routines in SILC Runtime Toolkit.
+ *
+ ***/
+typedef SilcCompareValue (*SilcCompare)(void *value1, void *value2,
+ void *context);
+
/* Macros */
#if (defined(SILC_I486) || defined(SILC_X86_64)) && defined(__GNUC__)
| ((SilcUInt32)(SilcUInt8)(cp)[3])
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
-/****d* silcutil/SILCTypes/SILC_GET16_MSB
+/****d* silcutil/SILC_MAX
+ *
+ * NAME
+ *
+ * #define SILC_MAX(a, b)
+ *
+ * DESCRIPTION
+ *
+ * Return `a' if it is bigger than `b', otherwise return `b'.
+ *
+ ***/
+#define SILC_MAX(a, b) ((a) > (b) ? (a) : (b))
+
+/****d* silcutil/SILC_MIN
+ *
+ * NAME
+ *
+ * #define SILC_MIN(a, b)
+ *
+ * DESCRIPTION
+ *
+ * Return `a' if it is smaller than `b', otherwise return `b'.
+ *
+ ***/
+#define SILC_MIN(a, b) ((a) < (b) ? (a) : (b))
+
+/****d* silcutil/SILC_GET16_MSB
*
* NAME
*
#endif /* (SILC_I386 || SILC_X86_64) && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_GET32_MSB
+/****d* silcutil/SILC_GET32_MSB
*
* NAME
*
| ((SilcUInt32)(SilcUInt8)(cp)[3]);
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
-/****d* silcutil/SILCTypes/SILC_GET64_MSB
+/****d* silcutil/SILC_GET64_MSB
*
* NAME
*
#endif /* SILC_X86_64 && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_GET16_LSB
+/****d* silcutil/SILC_GET16_LSB
*
* NAME
*
#endif /* SILC_I386 || SILC_X86_64 */
/***/
-/****d* silcutil/SILCTypes/SILC_GET32_LSB
+/****d* silcutil/SILC_GET32_LSB
*
* NAME
*
| ((SilcUInt32)(SilcUInt8)(cp)[3] << 24)
#endif /* SILC_I386 || SILC_X86_64 */
-/****d* silcutil/SILCTypes/SILC_PUT16_MSB
+/****d* silcutil/SILC_PUT16_MSB
*
* NAME
*
#endif /* (SILC_I386 || SILC_X86_64) && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_PUT32_MSB
+/****d* silcutil/SILC_PUT32_MSB
*
* NAME
*
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_PUT64_MSB
+/****d* silcutil/SILC_PUT64_MSB
*
* NAME
*
#endif /* SILC_X86_64 && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_PUT16_LSB
+/****d* silcutil/SILC_PUT16_LSB
*
* NAME
*
#endif /* SILC_I386 || SILC_X86_64 */
/***/
-/****d* silcutil/SILCTypes/SILC_PUT32_LSB
+/****d* silcutil/SILC_PUT32_LSB
*
* NAME
*
#endif /* SILC_I386 || SILC_X86_64 */
/***/
-/****d* silcutil/SILCTypes/SILC_SWAB_16
+/****d* silcutil/SILC_SWAB_16
*
* NAME
*
#endif /* (SILC_I386 || SILC_X86_64) && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_SWAB_32
+/****d* silcutil/SILC_SWAB_32
*
* NAME
*
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
/***/
-/****d* silcutil/SILCTypes/SILC_PTR_TO_32
+/****d* silcutil/SILC_PTR_TO_32
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SILC_PTR_TO_64
+/****d* silcutil/SILC_PTR_TO_64
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SILC_32_TO_PTR
+/****d* silcutil/SILC_32_TO_PTR
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/SILC_64_TO_PTR
+/****d* silcutil/SILC_64_TO_PTR
*
* NAME
*
#endif
/***/
-/****d* silcutil/SILCTypes/silc_rol
+/****d* silcutil/SILC_ASSERT
+ *
+ * NAME
+ *
+ * #define SILC_ASSERT(experssion)
+ *
+ * DESCRIPTION
+ *
+ * Assert macro that prints error message to stderr and calls abort()
+ * if the `expression' is false (ie. compares equal to zero). If
+ * SILC_DEBUG is not defined this macro has no effect.
+ *
+ * SOURCE
+ */
+#if defined(SILC_DEBUG)
+#define SILC_ASSERT(expr) assert((expr));
+#else
+#define SILC_ASSERT(expr) do { } while(0)
+#endif /* SILC_DEBUG */
+/***/
+
+/****d* silcutil/SILC_VERIFY
+ *
+ * NAME
+ *
+ * #define SILC_VERIFY(experssion)
+ *
+ * DESCRIPTION
+ *
+ * Verification macro that prints error message to stderr and calls
+ * abort() if the `expression' is false (ie. compares equal to zero)
+ * on debug builds (SILC_DEBUG defined), and prints error message to
+ * stderr on release builds (SILC_DEBUG undefined) but does not abort().
+ * This macro is always compiled even if debugging (SILC_DEBUG) is not
+ * defined.
+ *
+ * SOURCE
+ */
+#if defined(SILC_DEBUG)
+#define SILC_VERIFY(expr) assert((expr));
+#else
+#define SILC_VERIFY(expr) \
+ if (silc_unlikely(!(expr))) { \
+ SILC_LOG_ERROR(("SILC_VERIFY %s:%s:%d", \
+ __FILE__, __FUNCTION__, __LINE__)); \
+ silc_set_errno_reason_nofail(SILC_ERR_ASSERT, "SILC_VERIFY %s:%s:%d", \
+ __FILE__, __FUNCTION__, __LINE__); \
+ }
+#endif /* SILC_DEBUG */
+/***/
+
+/****d* silcutil/silc_rol
*
* NAME
*
{
#if (defined(SILC_I386) || defined(SILC_X86_64)) && defined(__GNUC__)
asm volatile ("roll %%cl, %0"
- : "=q" (val) : "0" (val), "c" (num));
+ : "=r" (val) : "0" (val), "c" (num));
return val;
#else
return ((val << (SilcUInt32)num) | (val >> (32 - (SilcUInt32)num)));
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
}
-/****d* silcutil/SILCTypes/silc_ror
+/****d* silcutil/silc_rolc
+ *
+ * NAME
+ *
+ * static inline SilcUInt32 silc_rolc(SilcUInt32 val, const int num);
+ *
+ * DESCRIPTION
+ *
+ * Rotate 32-bit integer's bits to left `num' times. Bits pushed to the
+ * left will appear from the right side of the integer, thus rotating.
+ * Returns the rotated value.
+ *
+ ***/
+static inline SilcUInt32 silc_rolc(SilcUInt32 val, const int num)
+{
+#if (defined(SILC_I386) || defined(SILC_X86_64)) && defined(__GNUC__)
+ asm volatile ("roll %2, %0"
+ : "=r" (val) : "0" (val), "I" (num));
+ return val;
+#else
+ return ((val << (SilcUInt32)num) | (val >> (32 - (SilcUInt32)num)));
+#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
+}
+
+/****d* silcutil/silc_ror
*
* NAME
*
{
#if (defined(SILC_I386) || defined(SILC_X86_64)) && defined(__GNUC__)
asm volatile ("rorl %%cl, %0"
- : "=q" (val) : "0" (val), "c" (num));
+ : "=r" (val) : "0" (val), "c" (num));
return val;
#else
return ((val >> (SilcUInt32)num) | (val << (32 - (SilcUInt32)num)));
#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
}
-/****d* silcutil/SILCTypes/silc_rol64
+/****d* silcutil/silc_rorc
+ *
+ * NAME
+ *
+ * static inline SilcUInt32 silc_ror(SilcUInt32 val, const int num);
+ *
+ * DESCRIPTION
+ *
+ * Rotate 32-bit integer's bits to right `num' times. Bits pushed to the
+ * right will appear from the left side of the integer, thus rotating.
+ * Returns the rotated value.
+ *
+ ***/
+static inline SilcUInt32 silc_rorc(SilcUInt32 val, const int num)
+{
+#if (defined(SILC_I386) || defined(SILC_X86_64)) && defined(__GNUC__)
+ asm volatile ("rorl %2, %0"
+ : "=r" (val) : "0" (val), "I" (num));
+ return val;
+#else
+ return ((val >> (SilcUInt32)num) | (val << (32 - (SilcUInt32)num)));
+#endif /* (SILC_I486 || SILC_X86_64) && __GNUC__ */
+}
+
+/****d* silcutil/silc_rol64
*
* NAME
*
{
#if defined(SILC_X86_64) && defined(__GNUC__)
asm volatile ("rolq %%cl, %0"
- : "=q" (val) : "0" (val), "c" (num));
+ : "=r" (val) : "0" (val), "c" (num));
+ return val;
+#else
+ return ((val << (SilcUInt64)num) | (val >> (64 - (SilcUInt64)num)));
+#endif /* SILC_X86_64 && __GNUC__ */
+}
+
+/****d* silcutil/silc_rolc64
+ *
+ * NAME
+ *
+ * static inline SilcUInt64 silc_rolc64(SilcUInt64 val, const int num);
+ *
+ * DESCRIPTION
+ *
+ * Rotate 64-bit integer's bits to left `num' times. Bits pushed to the
+ * left will appear from the right side of the integer, thus rotating.
+ * Returns the rotated value.
+ *
+ ***/
+static inline SilcUInt64 silc_rolc64(SilcUInt64 val, const int num)
+{
+#if defined(SILC_X86_64) && defined(__GNUC__)
+ asm volatile ("rolq %2, %0"
+ : "=r" (val) : "0" (val), "J" (num));
return val;
#else
return ((val << (SilcUInt64)num) | (val >> (64 - (SilcUInt64)num)));
#endif /* SILC_X86_64 && __GNUC__ */
}
-/****d* silcutil/SILCTypes/silc_ror64
+/****d* silcutil/silc_ror64
*
* NAME
*
{
#if defined(SILC_X86_64) && defined(__GNUC__)
asm volatile ("rorq %%cl, %0"
- : "=q" (val) : "0" (val), "c" (num));
+ : "=r" (val) : "0" (val), "c" (num));
return val;
#else
return ((val >> (SilcUInt64)num) | (val << (64 - (SilcUInt64)num)));
#endif /* SILC_X86_64 && __GNUC__ */
}
-/****d* silcutil/SILCTypes/silc_offsetof
+/****d* silcutil/silc_rorc64
+ *
+ * NAME
+ *
+ * static inline SilcUInt64 silc_rorc64(SilcUInt64 val, const int num);
+ *
+ * DESCRIPTION
+ *
+ * Rotate 64-bit integer's bits to right `num' times. Bits pushed to the
+ * right will appear from the left side of the integer, thus rotating.
+ * Returns the rotated value.
+ *
+ ***/
+static inline SilcUInt64 silc_rorc64(SilcUInt64 val, const int num)
+{
+#if defined(SILC_X86_64) && defined(__GNUC__)
+ asm volatile ("rorq %2, %0"
+ : "=r" (val) : "0" (val), "J" (num));
+ return val;
+#else
+ return ((val >> (SilcUInt64)num) | (val << (64 - (SilcUInt64)num)));
+#endif /* SILC_X86_64 && __GNUC__ */
+}
+
+/****d* silcutil/silc_offsetof
*
* NAME
*
***/
#define silc_offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
-/****d* silcutil/SILCTypes/silc_attribute
+/****d* silcutil/silc_attribute
*
* NAME
*
*
***/
#if defined(__GNUC__)
-#define silc_attribute(attrlist) __attribute__(attrlist)
+#define silc_attribute(attrlist) __attribute__ (attrlist)
#else
#define silc_attribute(attrlist)
#endif /* __GNUC__ */
-/****d* silcutil/SILCTypes/silc_likely
+/****d* silcutil/silc_likely
*
* NAME
*
*
* DESCRIPTION
*
- * Brach prediction macro. It specifies that it is likely that the brach
+ * Branch prediction macro. It specifies that it is likely that the branch
* where silc_likely is applied is taken. Compiler will optimize the
* code based on this prediction. Never use this before you have profiled
* the code first.
*
***/
-/****d* silcutil/SILCTypes/silc_unlikely
+/****d* silcutil/silc_unlikely
*
* NAME
*
*
* DESCRIPTION
*
- * Brach prediction macro. It specifies that it is unlikely that the brach
- * where silc_unlikely is applied is taken. Compiler will optimize the
- * code based on this prediction. Never use this before you have profiled
- * the code first.
+ * Branch prediction macro. It specifies that it is unlikely that the
+ * branch where silc_unlikely is applied is taken. Compiler will optimize
+ * the code based on this prediction. Never use this before you have
+ * profiled the code first.
*
***/
#if __GNUC__ >= 3
reading or writing if you think that the data will be needed soon after
prefetching. */
-/****d* silcutil/SILCTypes/silc_prefetch
+/****d* silcutil/silc_prefetch
*
* NAME
*
#endif /* __GNUC__ */
}
-/****d* silcutil/SILCTypes/silc_prefetch_block
+/****d* silcutil/silc_prefetch_block
*
* NAME
*
* Enforced block prefetch. This function loads the specified amount
* `prefetch_length' of memory from the specified address `addr' to CPU
* cache with each loaded cache line being the size of `cache_line_length'.
- * If you don't know the cache line size use 32 bytes. Note that, the
+ * If you don't know the cache line size use 64 bytes. Note that, the
* `cache_line_length' is a const int. In this context this mean its
* value must not come from a variable but must be a constant (the code
* won't compile if it comes from a variable).
*
* The `prefetch_length' must be multiple of twice of the
- * `cache_line_length' or 64 if you don't know the cache line size, hence
- * the minimum length for `prefetch_length' is 64 bytes when the
- * `cache_line_length' is 32 bytes.
+ * `cache_line_length' or 128 if you don't know the cache line size, hence
+ * the minimum length for `prefetch_length' is 128 bytes when the
+ * `cache_line_length' is 64 bytes. Shorter cache line length (32 bytes)
+ * can be used too.
*
* You should use the correct `cache_line_length' value for your CPU or
* the value of the CPU for which you want to optimize your code. Intel
- * CPUs usually have cache size of 32 or 64 bytes, or both when there are
- * multiple caches. The most optimal prefetch is achieved if the
- * `cache_line_length' is the actual CPU cache line size. Always do
- * performance testing with and without prefetching to make sure the
- * prefetch actually helps. If used improperly, it may slow down your
- * program.
+ * CPUs usually have cache size of 32 or 64 bytes. The most optimal
+ * prefetch is achieved if the `cache_line_length' is the actual CPU cache
+ * line size. Always do performance testing with and without prefetching
+ * to make sure the prefetch actually helps. If used improperly, it may
+ * slow down your program.
*
* The difference to silc_prefetch is that this function always performs
* the prefetch and has the ability to prefetch more than one cache line
projects / runtime.git / blobdiff